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Data Sheet No. PD-6.062A
IR2153
SELF-OSCILLATING HALF-BRIDGE DRIVER
Features
n Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage dV/dt immune n Undervoltage lockout n Programmable oscillator frequency
Product Summary
VOFFSET Duty Cycle IO+/Vclamp Deadtime (typ.) 600V max. 50% 200 mA / 400 mA 15.6V 1.2 s
f=
1 1.4 x (R T + 75) x CT
n Matched propagation delay for both channels n Micropower supply startup current of 90 A. n Shutdown function turns off both channels n Low side output in phase with RT
Packages
Description
The IR2153 is a high voltage, high speed, self-oscillating power MOSFET and IGBT driver with both high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The front end features a programmable oscillator which is similar to the 555 timer. The output drivers feature a high pulse current buffer stage and an internal deadtime designed for minimum driver cross-conduction. Propagation delays for the two channels are matched to simplify use in 50% duty cycle applications. The floating channel can
be used to drive an N-channel power MOSFET or IGBT in the high side configuration that operates off a high voltage rail up to 600 volts.
up to 600V
Typical Connection
VCC RT CT COM
VB HO VS LO
TO LOAD
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IR2153
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions.
Symbol
VB VS VHO VLO VRT VCT ICC IRT dVs/dt PD RJA TJ TS TL
Parameter Definition
High Side Floating Supply Voltage High Side Floating Supply Offset Voltage High Side Floating Output Voltage Low Side Output Voltage RT Voltage CT Voltage Supply Current (Note 1) RT Output Current Allowable Offset Supply Voltage Transient Package Power Dissipation @ TA +25C Thermal Resistance, Junction to Ambient Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 seconds) (8 Lead DIP) (8 Lead SOIC) (8 Lead DIP) (8 Lead SOIC)
Value Min.
-0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 -- -5 -- -- -- -- -- -- -55 --
Max.
625 VB + 0.3 VB + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 25 5 50 1.0 0.625 125 200 150 150 300
Units
V
mA V/ns W C/W
C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
VB VS VHO VLO ICC TA Note 1:
Parameter Definition
High Side Floating Supply Absolute Voltage High Side Floating Supply Offset Voltage High Side Floating Output Voltage Low Side Output Voltage Supply Current (Note 1) Ambient Temperature
Value Min.
VS + 10 -- VS 0 -- -40
Max.
VS + 20 600 VB VCC 5 125
Units
V
mA C
Because of the IR2153's application specificity toward off-line supply systems, this IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Therefore, the IC supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value resistor connected between the chip VCC and the rectified line voltage and a local decoupling capacitor from VCC to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. Therefore, this circuit should not be driven by a DC, low impedance power source of greater than VCLAMP.
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IR2153
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 12V, CL = 1000 pF and TA = 25C unless otherwise specified.
Symbol
tr tf t sd DT D
Parameter Definition
Turn-On Rise Time Turn-Off Fall Time Shutdown Propagation Delay Deadtime RT Duty Cycle
Value Min. Typ. Max. Units Test Conditions
-- -- -- -- -- 80 35 660 1.2 50 -- -- -- -- -- ns s %
Static Electrical Characteristics
VBIAS (VCC , VBS) = 12V, CL = 1000 pF, CT = 1 nF and TA = 25C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to COM. The V O and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
f OSC VCLAMP VCT+ VCTVCTSD VRT+ VRTVOH VOL I LK IQBS I QCCUV IQCC ICT VCCUV+ VCCUVVCCUVH I O+ IO-
Parameter Definition
Oscillator Frequency VCC Zener Shunt Clamp Voltage 2/3 VCC Threshold 1/3 VCC Threshold CT shutdown Input Threshold RT High Level Output Voltage, VCC - RT RT Low Level Output Voltage High Level Output Voltage, VBIAS - VO Low Level Output Voltage, VO Offset Supply Leakage Current Quiescent VBS Supply Current Micropower VCC Supply Startup Current Quiescent VCC Supply Current CT Input Current VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold VCC Supply Undervoltage Lockout Hysteresis Output High Short Circuit Pulsed Current Output Low Short Circuit Pulsed Current
Min.
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
Value Typ. Max. Units Test Conditions
20.0 100 15.6 8.0 4.0 2.2 0 200 20 200 -- -- -- 10 90 400 0.001 9.0 8.0 1.0 200 400 -- -- -- -- -- -- 100 300 50 300 100 100 50 -- -- -- 1.0 -- -- -- -- -- V mA VO = 0V VO = 15V kHz RT = 35.7 k RT = 7.04 k I CC = 5 mA
V IRT = -100 A IRT = -1 mA IRT = 100 A IRT = 1 mA I O = 0A I O = 0A VB = VS = 600V VCC < VCCUV VCC > VCCUV
mV
A
V
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IR2153
Functional Block Diagram
RT VB R + R R + R/2 + R/2 LOGIC DEAD TIME DELAY 15.6V LO S Q Q VCC DEAD TIME PULSE GEN
HV LEVEL SHIFT
Q PULSE FILTER R S HO
VS
CT
UV DETECT
COM
Lead Definitions
Lead Symbol Description
RT CT Oscillator timing resistor input,in phase with HO for normal IC operation Oscillator timing capacitor input, the oscillator frequency according to the following equation:
f=
1 1.4 x (R T + 75) x CT
VB HO VS VCC LO COM
where 75 is the effective impedance of the RT output stage High side floating supply High side gate drive output High side floating supply return Low side and logic fixed supply Low side gate drive output Low side return
Lead Assignments
8 Lead DIP
SO-8
IR2153 4
IR2153S
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IR2153
Device Information
Process & Design Rule Transistor Count Die Size Die Outline HVDCMOS 4.0 m 231 68 X 101 X 26 (mil)
Thickness of Gate Oxide Connections First Layer
Second Layer Contact Hole Dimension Insulation Layer Passivation Method of Saw Method of Die Bond Wire Bond Leadframe
Material Width Spacing Thickness Material Width Spacing Thickness Material Thickness Material Thickness
Package Remarks:
Method Material Material Die Area Lead Plating Types Materials
800A Poly Silicon 5 m 6 m 5000A Al - Si - Cu (Si: 1.0%, Cu: 0.5%) 6 m 9 m 20,000A 5 m X 5 m PSG (SiO2) 1.7 m PSG (SiO2) 1.7 m Full Cut Ablebond 84 - 1 Thermo Sonic Au (1.0 mil / 1.3 mil) Cu Ag Pb : Sn (37 : 63) 8 Lead PDIP / SO-8 EME6300 / MP150 / MP190
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IR2153
VCCUV+ VCC VCLAMP
RT (LO)
50% 50%
C T
RT
RT (HO)
tr tf 90% 90%
HO
LO HO
LO
10%
10%
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
RT
50% 50%
90%
LO HO
90%
10% DT
10%
Figure 3. Deadtime Waveform Definitions
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IR2153
8 Lead DIP
DIM A A1 B C D E e e1 H K L
INCHES MIN MAX .0532 .0688 .0040 .0098 .014 .018 .0075 .0098 .189 .196 .150 .157 .050 BASIC .025 BASIC .2284 .2440 .011 .019 .016 .050 0 8
MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.36 0.46 0.19 0.25 4.80 4.98 3.81 3.99 1.27 BASIC 0.635 BASIC 5.80 6.20 0.28 0.48 0.41 1.27 0 8
SO-8
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IR2153
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: 171 (K&H Bldg.), 30-4 Nishi-ikebukuro 3-Chome, Toshima-ku, Tokyo Japan Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 1/97
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